1. Field of the Invention
The present invention relates to an internal power-supply potential generating circuit, and more particularly, to an internal power-supply potential generating circuit that generates an internal power-supply potential based on an external power-supply potential.
2. Description of the Background Art
In a semiconductor memory device, reduction of power consumption has conventionally been attempted by operating an internal circuit with an internal power-supply potential intVCC that is lower than an external power-supply potential VCC. Thus, a semiconductor memory device is provided with an internal power-supply potential generating circuit that down-converts external power-supply potential VCC to generate internal power-supply potential intVCC. FIG. 8 shows a circuit diagram illustrating the configuration of such an internal power-supply potential generating circuit.
In FIG. 8, the internal power-supply potential generating circuit includes a reference potential generating circuit 50, a differential amplifier 53 and a P-channel MOS transistor 54. Reference potential generating circuit 50 includes a constant-current source 51 and a resistive element 52 connected in series between the line of external power-supply potential VCC and the line of a ground potential VSS. A-reference potential VR appears at a node N51 between constant-current source 51 and resistive element 52. P-channel MOS transistor 54 is connected between the line of external power-supply potential VCC and a power-supply node N54. The potential appearing at power-supply node N54 comes to be internal power-supply potential intVCC. Differential amplifier 53 has an inverting input terminal that receives reference potential VR, a noninverting input terminal that receives internal power-supply potential intVCC, and an output terminal connected to the gate of P-channel MOS transistor 54. Differential amplifier 53 and P-channel MOS transistor 54 constitute a voltage follower.
If internal power-supply potential intVCC is lower than reference potential VR, differential amplifier 53 outputs a signal at a logic low or xe2x80x9cLxe2x80x9d level to bring P-channel MOS transistor 54 into conduction. If internal power-supply potential intVCC is higher than reference potential VR, differential amplifier 53 outputs a signal at a logic high or xe2x80x9cHxe2x80x9d level to bring P-channel MOS transistor 54 out of conduction. Accordingly, internal power-supply potential intVCC is held at the same potential as reference potential VR.
It is required for a semiconductor memory device having external power-supply potential VCC of 2.5V to ensure normal operation even if external power-supply potential VCC varies in the range of 2.5Vxc2x10.2V. The semiconductor memory device having external power-supply potential VCC of 2.5V therefore requires a margin to set internal power-supply potential intVCC at 2.2V.
In internal power-supply potential generating circuit in FIG. 8, however, voltage drop of 0.2V occurs at constant-current source 51, which causes reference potential VR to be lower than 2.2V when external power-supply potential VCC is lowered to less than 2.4V. This makes it impossible to hold internal power-supply potential intVCC at 2.2V.
Moreover, output current of constant-current source 51 increases in proportional to temperature, so that reference potential VR is increased as the temperature increases, making internal power-supply potential intVCC higher than 2.2V.
A primary object of the present invention is, therefore, to provide an internal power-supply potential generating circuit that can generate a stable internal power-supply potential.
According to an aspect of the present invention, an internal power-supply potential generating circuit includes a switching element connected between a line of an external power-supply potential and a line of an internal power-supply potential, a reference potential generating circuit generating a predetermined first reference potential, a level shift circuit having a predetermined offset voltage and generating a second reference potential lower than the first reference potential by a predetermined voltage while generating a monitoring potential lower than the internal power-supply potential by a voltage obtained by adding the offset voltage to the predetermined voltage, and a differential amplifier bringing the switching element into conduction when the monitoring potential is lower than the second reference potential and bringing the switching element out of conduction when the monitoring potential is higher than the second reference potential. Accordingly, the internal power-supply potential is held at a potential obtained by adding the offset voltage to the first reference potential, allowing the first reference potential to be set lower by the offset voltage. Thus, even if the external power-supply potential is lowered, the first reference potential is not lowered, enabling generation of a stable internal power-supply potential. Moreover, the differential amplifier may be operated in a region with a large gain, so that responsibility to variation in the internal power-supply potential is improved.
According to another aspect of the present invention, an internal power-supply potential generating circuit includes a switching element connected between a line of the external power-supply potential and a line of the internal power-supply potential, a first voltage dividing circuit having a first voltage division ratio and generating a monitoring potential by dividing the internal power-supply potential, a reference potential generating circuit generating a predetermined first reference potential, a second voltage dividing circuit having a second voltage division ratio higher than the first voltage division ratio and generating a second reference potential by dividing the first reference potential, and a differential amplifier bringing the switching element into conduction when the monitoring potential is lower than the second reference potential and bringing the switching element out of conduction when the monitoring potential is higher than the second reference potential. Accordingly, the monitoring potential obtained by dividing the internal power-supply potential at the first voltage division ratio is held at the second reference potential obtained by dividing the first reference potential at a second voltage division ratio higher than the first division ratio, allowing the first reference potential to be set lower by the difference between the first and second voltage division ratios. Thus, even if the external power-supply potential is lowered, the first reference potential is not lowered, enabling generation of a stable internal power-supply potential.